1. Field of the Invention
This invention relates to a semiconductor memory device, and more particularly to the same with an electrically erasable and programmable read-only memory (EEPROM) element for keeping store information for instructing the replacement with a redundancy cell array.
2. Description of the Prior Art
Regarding a large capacity semiconductor memory device, faulty memory cell is found at a high incidence in the memory cell array. For overcoming this and increasing the yield redundancy technique of providing redundant elements replacing faulty elements is generally used.
Redundancy technique is various, for example, replacement for a memory cell array arranged in row and column directions in row or column unit by a certain number of redundancy cell rows or columns provided, or replacement for a specified storage capacity memory cell array consisting of blocks each including a specified number of memory cells arranged in block unit by a redundancy cell array having the same memory capacity as has one block.
In a semiconductor memory device of block-unit redundancy design by which replacement of a block containing a faulty memory cell by a redundant cell array is accomplished, after selecting a block of a memory cell array by a first address signal and then selecting a memory cell from the block by a second address signal, the write or readout of data into or from the memory is carried out. When the selected block contains a faulty memory cell, the write or readout of data can be carried out using the redundancy cell array.
Switch to the redundancy cell array is accomplished by a replacement-information memory circuit for holding replacement-request information indicating whether the memory cell array contains a faulty cell or not and discrimination-information indicating a block containing a faulty cell; and a redundancy selector which judges on the basis of these information whether a block selected by a first address signal contains a faulty cell or not.
The replacement-information memory circuit comprises a plurality of field effect transistors as electrically programmable read-only memory elements (Each transistor is referred to as memory transistor hereinafter).
In this memory transistor, in the state of the floating gate with no injected electrons on it, application of a specified voltage (usually supply voltage) to the control gate electrode results in forming a channel between the source and drain electrodes, through which electric current flows. In the state of the floating gate with injected electrons on it, if a specified voltage is impressed to the control gate electrode, the accumulated electrons on the floating gate inhibits formation of channel between the source and drain electrodes , hence no current flowing between them. By utilization of this characteristic of the memory transistor described above, the replacement-information memory circuit can hold replacement-request information and discrimination information as described above.
Injection of electrons into the floating gate region of the memory transistor is performed as follows:
Using the source electrode as a reference potential, high voltage is applied to the drain electrode and the control gate electrode to attract hot electrons generated between the source and drain electrodes. Consequently the thus-injected electrons are trapped at the floating gate located on the way of the attraction path.
Similarly, application of a high voltage to the control gate electrode using the source and drain electrodes as reference potential induces source electrode and drain electrode, in combination with a large electric field applied between the source/drain electrodes and control gate electrode, induces a Fowler-Nordheim tunneling current, and thus electrons are injected into the region of the floating gate located between these electrodes.
In the above-mentioned way of the injection of electrons into the floating gate region, the above-mentioned replacement-request information and discrimination information are written and stored in the specified memory transistors of the replacement-information memory circuit. The writing is carried out at the stage of products inspection. Thereafter the control gate electrodes of all memory transistors of the replacement-information memory circuit about every product are fixedly connected to the supply voltage terminal to be always allowed to read the stored information out of them.
Storage of a binary 1 or 0 in the above-mentioned memory transistors of the replacement-information memory circuit is carried out by injection of electrons to the floating gate region. Because of this, very thin insulating films between the floating gate and the source/drain electrodes and between the floating gate and control gate electrode are formed. Once the semiconductor memory device comprising the replacement-information memory circuit is connected to a supply source, the supply voltage is always applied to the control gate electrode of the memory transistor, and the resulting large electric field is applied to the accumulated electrons on the floating gate, which leaks out little by little because of very small flaws inevitable in the fabrication process in the insulating film and the occurrence of Fowler-Nordheim tunneling current. Thus there is danger associated with a long-term use them that the memory information of the replacement-information memory circuit fades away.